Otg_Fs Programming Model; Core Initialization - ST STM32F207 Series Reference Manual

Advanced arm-based 32-bit mcus
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USB on-the-go full-speed (OTG_FS)
29.17

OTG_FS programming model

29.17.1

Core initialization

The application must perform the core initialization sequence. If the cable is connected
during power-up, the current mode of operation bit in the OTG_FS_GINTSTS (CMOD bit in
OTG_FS_GINTSTS) reflects the mode. The OTG_FS controller enters host mode when an
"A" plug is connected or device mode when a "B" plug is connected.
This section explains the initialization of the OTG_FS controller after power-on. The
application must follow the initialization sequence irrespective of host or device mode
operation. All core global registers are initialized according to the core's configuration:
1.
Program the following fields in the OTG_FS_GAHBCFG register:
2.
Program the following fields in the OTG_FS_GUSBCFG register:
3.
The software must unmask the following bits in the OTG_FS_GINTMSK register:
OTG interrupt mask
Mode mismatch interrupt mask
4.
The software can read the CMOD bit in OTG_FS_GINTSTS to determine whether the
OTG_FS controller is operating in host or device mode.
1052/1381
Global interrupt mask bit GINTMSK = 1
RxFIFO non-empty (RXFLVL bit in OTG_FS_GINTSTS)
Periodic TxFIFO empty level
HNP capable bit
SRP capable bit
FS timeout calibration field
USB turnaround time field
RM0033 Rev 9
RM0033

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