ST STM32F207 Series Reference Manual page 1169

RM0033
OTG_HS device V
Address offset: 0x082C
Reset value: 0x0000 05B8
This register specifies the V
31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10
Bits 31:12 Reserved, must be kept at reset value.
Bits 11:0 DVBUSP: Device V
pulsing time register (OTG_HS_DVBUSPULSE)
BUS
BUS
Reserved
pulsing time
BUS
Specifies the V pulsing time during SRP. This value equals:
BUS
V pulsing time in PHY clocks / 1 024
BUS
USB on-the-go high-speed (OTG_HS)
pulsing time during SRP.
rw rw rw rw rw rw rw rw rw rw rw rw
RM0033 Rev 9
9 8 7 6 5 4 3
DVBUSP
2 1 0
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