Table 207. Swj Debug Port Pins; Table 208. Flexible Swj-Dp Pin Assignment - ST STM32F207 Series Reference Manual

Debug support (DBG)
32.4.1 SWJ debug port pins
Five pins are used as outputs from the STM32F20x and STM32F21x for the SWJ-DP as
alternate functions of general-purpose I/Os. These pins are available on all packages.
SWJ-DP pin name
Type
JTMS/SWDIO
JTCK/SWCLK
JTDI
JTDO/TRACESWO
NJTRST
32.4.2 Flexible SWJ-DP pin assignment
After RESET (SYSRESETn or PORESETn), all five pins used for the SWJ-DP are assigned
as dedicated pins immediately usable by the debugger host (note that the trace outputs are
not assigned except if explicitly programmed by the debugger host).
However, the STM32F20x and STM32F21x MCUs offers the possibility of disabling some or
all of the SWJ-DP ports and so, of releasing the associated pins for general-purpose IO
(GPIO) usage. For more details on how to disable SWJ-DP port pins, please refer to
Section 6.3.2: I/O pin multiplexer and
Full SWJ (JTAG-DP + SW-DP) - Reset State
Full SWJ (JTAG-DP + SW-DP) but without NJTRST
JTAG-DP Disabled and SW-DP Enabled
JTAG-DP Disabled and SW-DP Disabled
Note: When the APB bridge write buffer is full, it takes one extra APB cycle when writing the
GPIO_AFR register. This is because the deactivation of the JTAGSW pins is done in two
cycles to guarantee a clean level on the nTRST and TCK input signals of the core.
•
Cycle 1: the JTAGSW input signals to the core are tied to 1 or 0 (to 1 for nTRST, TDI
and TMS, to 0 for TCK)
• Cycle 2: the GPIO controller takes the control signals of the SWJTAG IO pins (like
controls of direction, pull-up/down, Schmitt trigger activation, etc.).
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Table 207. SWJ debug port pins

JTAG debug port
Description
I JTAG Test Mode Selection
I JTAG Test Clock
I JTAG Test Data Input
O JTAG Test Data Output
I JTAG Test nReset

Table 208. Flexible SWJ-DP pin assignment

Available debug ports
SW debug port
Type Debug assignment
IO Serial Wire Data Input/Output
I Serial Wire Clock
- -
TRACESWO if async trace is
-
enabled
- -
mapping.
PA13 /
JTMS /
SWDIO
X
X
X
RM0033 Rev 9
SWJ IO pin assigned
PA14 /
PA15 / PB3 /
JTCK /
JTDI JTDO
SWCLK
X X X
X X X
X
Released
RM0033
Pin
assignment
PA13
PA14
PA15
PB3
PB4
PB4 /
NJTRST
X