ST STM32F207 Series Reference Manual page 1353

Advanced arm-based 32-bit mcus
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RM0033
Date
09-Dec-2010
Table 224. Document revision history (continued)
Version
DAC
Updated V
Camera interface (DCMI)
Recommended 32-bit access for DCMI registers.
Removed F
Section 12.5: DCMI functional
remove NRST
Removed section "Slave AHB interface".
Updated
Section 12.5.1: DMA interface
DMA transfer.
Changed clock to pixel clock in
interface, and
Removed section "Parallel interface width".
Section 12.8.1: DCMI control register 1
bit, updated ESS bit description to distinguish between hardware and
embedded synchronization, replaced RAM by destination memory in
CM and CAPTURE bit description. Added note for ERR_IE and
ERR_ISC.
Section 12.8.3: DCMI raw interrupt status register
(DCMI_RIS)/Section 12.8.5: DCMI masked interrupt status register
(DCMI_MIS): added note to indicated that ERR_RIS/MIS bit is
available only in embedded synchronization mode.
Added note for ERR_IE and ERR_ISC in
2
interrupt enable register
(continued)
All OVR_ bit descriptions changed to overrun status.
General-purpose timers (TIM9 to TIM14)
Updated CC1NP and CC2NP for
capture
mode,
Section 15.3.10: One-pulse
Updated URS and UDIS bit description in
control register 1
Updated description of CC1IF and UIF bits in
TIM9/12 status register
Updated description of TG and UG bits in
event generation register
Added CC1NP and CC2NP bits in
capture/compare enable register
Updated UDIS, URS, and CEN bit description in
TIM9/12 control register 1
TIMx_CR2 register.
Updated CC1IF and UIF bit description in
TIM10/11/13/14 status register
Updated UG bit description in
generation register
Updated OC1M and OC1PE bit description; and changed bit 2
register from reserved to OC1FE in
capture/compare mode register 1
RM0033 Rev 9
Changes
range in
Table 41: DAC
REF
maximum value in
PIXCLK
overview; updated
,
AHB, DMA_ACK, and change IT_CCI to DCMI_IT.
Section 12.5.2: DCMI physical
Figure 58
corrected.
(DCMI_IER).
TIM9/12
Section 15.3.6: PWM input mode (only for
mode.
(TIMx_CR1).
(TIMx_SR).
(TIMx_EGR).
(TIMx_CCER).
(TIMx_CR1). Removed TIM10/11/13/14
(TIMx_SR).
Section 15.5.4: TIM10/11/13/14 event
(TIMx_EGR).
(TIMx_CCMR1).
Revision history
pins.
Section 12.4: DCMI
clocks.
Figure 57
overview and removed figure
(DCMI_CR): removed CRE
Section 12.8.4: DCMI
in
Section 15.3.5: Input
TIM9/12),
Section 15.4.1: TIM9/12
Section 15.4.5:
Section 15.4.6: TIM9/12
Section 15.4.8: TIM9/12
Section 15.4.1:
Section 15.5.3:
Section 15.5.5: TIM10/11/13/14
to
1353/1381
1375

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