ST STM32F207 Series Reference Manual page 1014

USB on-the-go full-speed (OTG_FS)
Bit 5 POCCHNG: Port overcurrent change
Bit 4 POCA: Port overcurrent active
Bit 3 PENCHNG: Port enable/disable change
Bit 2 PENA: Port enable
Bit 1 PCDET: Port connect detected
Bit 0 PCSTS: Port connect status
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The core sets this bit when the status of the Port overcurrent active bit (bit 4) in this register
changes.
Indicates the overcurrent condition of the port.
0: No overcurrent condition
1: Overcurrent condition
The core sets this bit when the status of the Port enable bit 2 in this register changes.
A port is enabled only by the core after a reset sequence, and is disabled by an overcurrent
condition, a disconnect condition, or by the application clearing this bit. The application
cannot set this bit by a register write. It can only clear it to disable the port. This bit does not
trigger any interrupt to the application.
0: Port disabled
1: Port enabled
The core sets this bit when a device connection is detected to trigger an interrupt to the
application using the host port interrupt bit in the Core interrupt register (HPRTINT bit in
OTG_FS_GINTSTS). The application must write a 1 to this bit to clear the interrupt.
0: No device is attached to the port
1: A device is attached to the port
RM0033 Rev 9
RM0033