ST STM32F207 Series Reference Manual page 1228

Advanced arm-based 32-bit mcus
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USB on-the-go high-speed (OTG_HS)
8. If the periodic request queue depth is smaller than the periodic transfers scheduled
in a micro-frame, a frame overrun condition occurs.
Handling babble conditions
OTG_HS controller handles two cases of babble: packet babble and port babble.
Packet babble occurs if the device sends more data than the maximum packet size for
the channel. Port babble occurs if the core continues to receive data from the device at
EOF2 (the end of frame 2, which is very close to SOF).
When OTG_HS controller detects a packet babble, it stops writing data into the Rx
buffer and waits for the end of packet (EOP). When it detects an EOP, it flushes already
written data in the Rx buffer and generates a Babble interrupt to the application.
When OTG_HS controller detects a port babble, it flushes the RxFIFO and disables the
port. The core then generates a Port disabled interrupt (HPRTINT in
OTG_HS_GINTSTS, PENCHNG in OTG_HS_HPRT). On receiving this interrupt, the
application must determine that this is not due to an overcurrent condition (another
cause of the Port Disabled interrupt) by checking POCA in OTG_HS_HPRT, then
perform a soft reset. The core does not send any more tokens after it has detected a
port babble condition.
Bulk and control OUT/SETUP transactions in DMA mode
The sequence of operations is as follows:
a)
b)
c)
d)
e)
NAK and NYET handling with internal DMA
a)
b)
c)
d)
e)
The core does not generate a separate interrupt when NAK or NYET is received by the
host functionality.
Bulk and control IN transactions in DMA mode
The sequence of operations is as follows:
a)
b)
1228/1381
Initialize and enable channel 1 as explained in
The HS_OTG host starts fetching the first packet as soon as the channel is
enabled. For internal DMA mode, the OTG_HS host uses the programmed DMA
address to fetch the packet.
After fetching the last word of the second (last) packet, the OTG_HS host masks
channel 1 internally for further arbitration.
The HS_OTG host generates a CHH interrupt as soon as the last packet is sent.
In response to the CHH interrupt, de-allocate the channel for other transfers.
The OTG_HS host sends a bulk OUT transaction.
The device responds with NAK or NYET.
If the application has unmasked NAK or NYET, the core generates the
corresponding interrupt(s) to the application. The application is not required to
service these interrupts, since the core takes care of rewinding the buffer pointers
and re-initializing the Channel without application intervention.
The core automatically issues a ping token.
When the device returns an ACK, the core continues with the transfer. Optionally,
the application can utilize these interrupts, in which case the NAK or NYET
interrupt is masked by the application.
Initialize and enable the used channel (channel x) as explained in
Channel
initialization.
The OTG_HS host writes an IN request to the request queue as soon as the
channel receives the grant from the arbiter (arbitration is performed in a round-
robin fashion).
RM0033 Rev 9
Section : Channel
initialization.
Section :
RM0033

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