Method For Starting The Flash Memory's Automatic Algorithm - Fujitsu F2MC-16LX Hardware Manual

Mb90470 series 16-bit microcontroller
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26.4 Method for Starting the Flash Memory's Automatic
Algorithm
There are four kinds of commands for starting the automatic algorithm for flash
memory: read/reset, write, and chip erase. For sector erase operations, control of
suspension and resuming is provided.
I Command sequence table
Table 26.4-1 "Command sequence table" lists the commands used for flash memory write/erase
operations. Although the data for writing to the command register is indicate in units of bytes,
use word access during actual operations. (The contents of the upper byte are ignored in this
case).
Table 26.4-1 Command sequence table
1st bus write
Bus
Command
write
sequence
cycle
Address
Read/reset
1
FxXXXX XXF0
(*1)
Read/reset
4
FxAAAA XXAA
(*1)
Write program
4
FxAAAA XXAA
Chip erase
6
FxAAAA XXAA
Sector erase
6
FxAAAA XXAA
Sector erase suspend
Sector erase resume
Note1: The address Fx in the table represents FF, FE, FD or FC. Specify the actual value corresponding to the bank to be accessed in
each operation.
Note2: The address in the table indicates the value in the CPU memory map. Addresses and data are indicated in hexadecimal
representation; "X" indicates an arbitrary value.
RA: Read address
PA: Write address. Only even addresses can be specified.
SA: Sector address (Refer to Section
RD: Read data
PD: Write data; only words can be specified
*1: Both read and reset commands allow the flash memory to be reset to read mode.
2nd bus write
cycle
cycle
Data
Address
Data
-
-
Fx5554
XX55
Fx5554
XX55
Fx5554
XX55
Fx5554
XX55
Entering xxB0H at address "FxXXXX" will suspend a erasure in sector erase mode.
Entering xx30H at address "FxXXXX" will resume erasure in sector erase suspend mode.
26.2
"Sector Configuration of 2M Bit Flash Memory")
CHAPTER 26 2M BIT FLASH MEMORY
3rd bus write
4th bus write
cycle
cycle
Address
Data
Address
Data
-
-
-
FxAAAA XXF0
RA
PA
FxAAAA XXA0
(even)
(word)
FxAAAA
XX80
FxAAAA XXAA
FxAAAA
XX80
FxAAAA XXAA
5th bus write
6th bus write
cycle
Address
Data
Address
-
-
-
-
RD
-
-
-
PD
-
-
-
Fx5554
XX55
FxAAAA XX10
SA
Fx5554
XX55
(even)
cycle
Data
-
-
-
XX30
475

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