Fujitsu F2MC-16LX Hardware Manual page 245

I Timer counter data register (TCDT)
Timer counter data register (TCDT) has the bit configuration shown below.
Figure 12.2-7 Bit configuration of timer counter data register (TCDT)
15
000063 T15
H
(R/W) (R/W) (R/W) (R/W) (R/W) (R/W) (R/W) (R/W) Initial value 00000000
7
000062 T07
H
(R/W) (R/W) (R/W) (R/W) (R/W) (R/W) (R/W) (R/W) Initial value 00000000
The timer counter data register (TCDT) is used to read the value of the 16-bit free-running timer
counter. The counter value is cleared to "0000" by a reset. Writing to this register must be
performed in the stopped (STOP = 1) state, and the written value defines the timer value.
This register requires word access. The 16-bit free-running timer is initialized with the following
causes:
• Reset
• Control status: clear bit (CLR)
• Matching between the compare clear register of output compare and timer counter value
(requiring mode setting).
I Timer counter control status register (TCCS)
Timer counter control status register (TCCS) has the bit configuration shown below.
Figure 12.2-8 Bit configuration of timer counter control status register (TCCS)
15
000065 ECKE
H
(R/W) (R/W) (R/W) (R/W) (R/W) (R/W) (R/W) (R/W) Initial value 0--00000
7
000064 IVF
H
(R/W) (R/W) (R/W) (R/W) (R/W) (R/W) (R/W) (R/W) Initial value 00000000
Timer counter control status register (TCCS) consists of bits that have the functions explained
below.
[Bit 15] ECKE
This bit is used to select whether the count clock source of the 16-bit free-running timer is
internal or external. Since the clock is changed soon after being written to this bit, change
the bit setting when output compare and input capture are in the stopped state.
0
1
[Bits 14,13] Unused bits
These bits are not used.
14 13 12
T14 T13 T12
6 5 4
T06 T05 T04
14 13 12 11
- - MSI2 MSI1 MSI0 ICLR ICRE
6 5 4 3
IVFE STOP MODE SCLR CLK2 CLK1 CLK0 Timer counter control/status register
Internal clock source is selected (initial value)
Clock is input from external pin (FRCK)
CHAPTER 12 16-BIT INPUT/OUTPUT TIMER
11 10 9 8
T11 T10 T09 T08
3 2 1 0
T03 T02 T01 T00
10 9 8 TCCS
Timer counter control/status register
2 1 0 TCCS
TCDT
Timer counter data register
B
TCDT
Timer counter data register
B
B
B
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