Condition Of Pins As Result Of Reset - Fujitsu F2MC-16LX Hardware Manual

4.6

Condition of Pins as Result of Reset

This section explains the states of pins after a reset.
I Pin states during a reset
States of the pins during a reset are determined by the settings of mode pins MD2 to MD0.
❍ If the internal vector mode is set (MD2 to MD0 = "011
All I/O pins (resource pins) become set at the high-impedance state, and mode data is read
from internal ROM.
Refer to Section 6.7 "Pin States in Standby Mode, Hold, and Reset", for the states of pins during
a reset.
I Pin states after mode data Is read
The states of the pins after mode data is read are determined by mode data (M1, M0).
❍ If the single-chip mode is set (M1, M0 = "00
All I/O pins (resource pins) become set at the high-impedance state, and mode data is read
from the internal ROM.
Note:
Take care with the pins that have the high-impedance state during a reset so that equipment
connected to the pins do not malfunction.
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B
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B
CHAPTER 4 RESET
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