Fujitsu F2MC-16LX Hardware Manual page 537

❍ I/O direct addressing (io)
Specify an 8-bit offset explicitly for the memory address in an operand. The I/O address space
in the physical address space from 000000H to 0000FFH is accessed regardless of the data
bank register (DTB) and direct page register (DPR). A bank select prefix for bank addressing is
invalid if specified before an instruction using I/O direct addressing.
Figure B.3-5 Example of I/O direct addressing (io)
MOVW A, i:0C0H (This instruction reads data by I/O direct addressing and stores it in A.)
Before execution
After execution
❍ Abbreviated direct addressing (dir)
Specify the eight low-order bits of a memory address explicitly in an operand. Address bits 8 to
15 are specified by the direct page register (DPR). Address bits 16 to 23 are specified by the
data bank register (DTB).
Figure B.3-6 Example of abbreviated direct addressing (dir)
MOVW S;20H, A
Before execution
After execution
❍ Direct addressing (addr16)
Specify the 16 low-order bits of a memory address explicitly in an operand. Address bits 16 to
23 are specified by the data bank register (DTB). A prefix instruction for access space
addressing is invalid for this mode of addressing.
Figure B.3-7 Example of direct addressing (addr16)
BRA 3B20H
Before execution
After execution
A 0 7 1 6 2 5 3 4
A 2 5 3 4 F F E E
(This instruction writes the contents of the eight low-order bits of A in abbreviated
direct addressing mode.)
A 4 4 5 5 1 2 1 2
6 6 DTB
A 4 4 5 5 1 2 1 2
6 6 DTB
(This instruction causes an unconditional relative branch.)
PC 3 C 2 0 PCB
PC 3 B 2 0 PCB
APPENDIX B Instructions
Memory space
0000C1H
F F
E E
0000C0H
Memory space
7 7 776620H ? ?
Memory space
7 7 776620H 1 2
4 F Memory space
4F3C22H F F
4F3C21H F E
4F3C20H 6 0
4 F
4F3B20H
BRA 3B20H
521