Fujitsu F2MC-16LX Hardware Manual page 165

Pin states in external bus 16-bit data bus mode and multiplex 16-bit external bus mode
Table 6.7-2 "Pin states in external bus 16-bit data bus mode and multiplex 16-bit external bus
mode" summarizes pin states in the external bus 16-bit data bus mode and multiplex 16-bit
external bus mode.
Table 6.7-2 Pin states in external bus 16-bit data bus mode and multiplex 16-bit external bus mode
Pin name In sleep state
P07 to P00
(AD07 to AD00)
Input disabled/
Output Hi-Z
P17 to P10
(AD15 to AD08)
P27 to P20 Output state
(A23 to A16) (*1, *4)
Input disabled/
P57 (CLK) Output enabled
(*2, *4)
P56 (RDY)
Maintains the
previous state
P55 (HAK)
(*5)
P54 (HRQ)
P53 (WRH)
"H" output (*4)
P52 (WRL)
P51 (RD) "H" output
P50 (ALE) "L" output
P37 to P30
P47 to P40
P67 to P60
Maintains the
P77 to P70 previous state
(*5)
P97 to P91
PA3 to PA0
P90 (CS0)
Input enabled
P87 to P80
(*3)
*1: "Output state" means that the pin-drive transistors are set in a drive-enabled state, but internal circuits are stopped so that a fixed value, "H" or "L", is
output. When internal peripheral circuits are in operation and output functions are used, output varies except when reset. Output does not vary during a
reset.
*2: "Output enabled" means that the pin-drive transistors are set in a drive state and that internal circuit operations are enabled. Operational states therefore
are conveyed on the pins.
*3: Same as in other ports when used in the output state. "Input enabled" means that input functions are ready and require pull up/pull down or external input.
*4: The previous values are retained if used as an output port.
*5: The state output immediately before this mode was set is output as is. If it is input, input is disabled. "Input disabled" means that operations of input gates
located very close to the pins are enabled, but pin states cannot be accepted in internal operations because internal circuits are not operating.
*6: "Input cutoff" means that operations of input gates located very close to the pins are disabled. "Output Hi-Z" means that the pin-drive transistors are
disabled and the pins are set to the high-impedance state.
When stopped
SPL = 0 SPL = 1
Input cutoff/
Output Hi-Z
Output state
(*1, *4)
Input disabled/
Output state
(*1, *4)
Input cutoff/
Maintains the
previous state
(*5, *6)
Input cutoff/
Output Hi-Z (*6)
"H" output (*4)
"H" output
"L" output
Input cutoff/
Maintains the
previous state
(*5)
Input enabled Input enabled
(*3) (*3)
CHAPTER 6 LOW-POWER CONSUMPTION MODE
In hold state When reset
Input disabled/ Input disabled/
Output Hi-Z Output Hi-Z
Input disabled/
Output state
Output Hi-Z
(*1)
(*4)
Input disabled/ Input disabled/
Output enabled Output enabled
(*2, *4) (*2)
Input disabled
(*4)
Input disabled/
"L" output Output Hi-Z
"I" input
Input disabled/
Output Hi-Z
(*4)
"H" output
Input disabled/
Output Hi-Z
Output enabled
(*2)
Input disabled/
Output Hi-Z
Maintains the
previous state
(*5)
"H" output
Input disabled
Internal ROM access Internal ROM access
immediately after after external ROM
reset cancellation access
Output Hi-Z/Input Output Hi-Z/Input
enabled enabled
Maintains the previous
Output state (*1)
address
CLK output
CLK output
Output Hi-Z/Input Output Hi-Z/Input
enabled enabled
"H" output "H" output
"L" output "L" output
Output Hi-Z/Input Output Hi-Z/Input
enabled enabled
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