Overview Of 2M Bit Flash Memory - Fujitsu F2MC-16LX Hardware Manual

CHAPTER 26 2M BIT FLASH MEMORY

26.1 Overview of 2M Bit Flash Memory

In the CPU memory map, the 2M bit flash memory is allocated in banks FC-FF, and the
operations for using the flash memory interface circuit, read access, and program
access from the CPU are provided just as they are for mask ROM. Writing data to
flash memory and erasing data from flash memory is enabled with instructions from
the CPU via the flash memory interface circuit. Thus, the contents of the flash memory
can be rewritten in implementation mode under control from the built-in CPU, enabling
the efficient tuning of programs and data.
Selector operations, such as enable sector protect, are not available.
I Features of the 2M bit flash memory
The 2M bit flash memory has the following features:
• 256K words x 8 bits/128K words x 16 bits (16K + 8K + 8K + 32K + 64K + 64K + 64K) sector
configuration
• Automatic program algorithm (Embedded Algorithm, which is the same as that for the
MBM29F400TA)
• Built-in erasure suspend/erasure resume functions
• Detection of completion of write/erase operations using data polling and a toggle bit
• Detection of completion of write/erase operations using CPU interrupts
• Compatibility with JEDEC-standard commands
• Sector-level erasure is available (any combination of sectors is allowed)
• Minimum write/erase count: up to 10,000
Embedded Algorithm is a trademark of Advanced Micro Devices, Inc.
I Methods for writing/erasing flash memory
Flash memory cannot be written and read at the same time. Write/read operations of programs
operating on flash memory must therefore be implemented in the following steps: Data must first
be copied to RAM, then the program operates on the RAM data, and finally the result is written
back to flash memory. In other words, program execution must be performed without
intermediate accesses to flash memory.
I Flash memory control status register (FMCS)
The following diagram shows the bit configuration of the flash memory control status register
(FMCS) used by the flash memory.
Bit number
Address: 0000AE
Read/write
Initial value
470
7 6 5
INTE RDYINT WE RDY Reserved LPM1 Reserved LPM0
H
(R/W) (R/W) (R/W) (W)
(0) (0) (0) (X)
4 3 2 1
(W) (R/W) (W)
(0) (0) (0)
0
(R/W)
(0)