16-Bit Free-Running Timer Timing - Fujitsu F2MC-16LX Hardware Manual

12.3.4 16-bit free-running timer timing

The 16-bit free-running timer is incremented according to the timing of input clock
(internal or external clock). If an external clock is selected, counting is performed at
the rising edge.
I Count timing of free-running timer
Figure 12.3-6 "Count timing of free-running time" shows the count timing of the free-running
timer.
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External clock input
Count clock
Counter value
The counter is cleared by either a reset, software, or a match with compare register 0. Counter
clear by a reset or software occurs when a clear operation is performed. Counter clear because
of a match with compare register 0 occurs in sync with count timing.
I Clear timing of free-running timer (match with compare register 0)
Figure 12.3-7 "Clear timing of free-running timer (match with compare register 0)" shows the
clear timing of the free-running timer caused by a match with compare register 0.
Figure 12.3-7 Clear timing of free-running timer (match with compare register 0)
Compare register value
Compare match
Counter value
Figure 12.3-6 Count timing of free-running timer
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CHAPTER 12 16-BIT INPUT/OUTPUT TIMER
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