Fujitsu F2MC-16LX Hardware Manual page 594

INDEX
operation mode ............................ 158, 342, 366, 406
operation mode, selection of ................................ 288
operation of extended intelligent I/O service (EI
..................................................................... 82
operation state, confirmation of............................ 291
operation, outline of.............................................. 446
opscillator and external clock, connection of........ 126
oscillation clock frequency ................................... 496
oscillation stabilization wait time........... 104, 125, 154
oscillation stabilization wait time, timer function for
................................................................... 197
other consideration............................................... 437
output compare register, list of ............................. 232
output compare, block diagram of ........................ 233
output pin register (ODR7, ODR4) ....................... 187
output pin, change timing of ................................. 246
output waveform, examples of ............................. 242
P
package dimension (LQFP-100) .............................. 6
package dimension (QFP-100) ................................ 7
PG control/status register (PGCSR)..................... 305
pin assignment diagram (LQFP-100) .......................9
pin assignment diagram (QFP-100) ......................... 8
pin function............................................................. 10
pin output control of pulse .................................... 344
pin state................................................................150
pin state after mode data is read.......................... 111
pin state during reset............................................111
PLL clock mode.................................................... 121
PLL clock multiplication rate, selection of............. 122
Port direction register (DRR0 to DRRA)............... 185
port register (PDR0 to PDRA) .............................. 184
PPG output operation........................................... 343
PPG0 to PPG5 output control register
(PPG0/1,PPG2/3,PPG4/5) .........................339
PPG0/2/4 operation mode control register (PPGC0)
................................................................... 334
PPG1/3/5 operation mode control register (PPGC1)
................................................................... 336
prefix instruction ..................................................... 40
processor status (PS)............................................. 31
product configuration................................................4
program count bank register (PCB)........................ 35
program counter (PC) ............................................ 34
pulse width ........................................................... 344
pulse width measurement function, operation of
................................................................... 286
pulse width measurement, operational flow of ..... 299
578
pulse width/interval calculation method ............... 298
PWC control/status register (PWCSR0 to PWCSR2)
2
................................................................... 277
OS)
PWC data buffer register (PWCR0 to PWCR 2) .. 282
PWC Timer function............................................. 274
PWC timer operation, outline of ........................... 284
PWC timer register, list of .................................... 276
PWC timer usage, note on................................... 301
PWC timer, block diagram of ............................... 275
R
ready function ...................................................... 175
register bank pointer (RP)...................................... 32
register, list of............................................... 165, 314
reload and compare function ............................... 267
reload function ..................................................... 267
reload mode ......................................................... 323
reload operation mode ......................................... 292
reload register ...................................................... 341
reload register, write timing to.............................. 346
reload value ................................................. 292, 344
reload/compare register 0/1 (RCR0/1)................. 263
repeated measurement........................................ 295
request level setting register ................................ 350
reset factor ........................................... 102, 104, 110
reset state waiting for stable oscillation ............... 105
reset-factor bit .............................................. 109, 110
restart................................................................... 291
restting, overview of ............................................. 107
ROM mirror function selection module................. 466
ROM mirror function selection module,
block diagram of ........................................ 466
ROM mirror function selection module, register of
................................................................... 466
ROMM (ROM mirror function select register) ...... 467
S
sector configuration.............................................. 471
sector delete timer flag (DQ3), state transitions of
................................................................... 482
sector erase operation ......................................... 482
sector erase suspend........................... 479, 480, 482
sector erasure, procedure for............................... 488
serial clock input frequency.................................. 496
serial control register (SCR)................................. 399
serial data transfer, operation during ................... 391
serial I/O unit, operational states of ..................... 388
serial input/output register (SIDR/SODR) ............ 401
serial mode control status register (SMCS) ......... 380