Fujitsu F2MC-16LX Hardware Manual page 545

❍ Accumulator indirect branch addressing (@A)
The address of the branch destination is the content (16 bits) of the low-order bytes (AL) of the
accumulator. It indicates the branch destination in the bank address space. Address bits 16 to
23 are specified by the program bank register (PCB). For the Jump Context (JCTX) instruction,
however, address bits 16 to 23 are specified by the data bank register (DTB). This addressing is
used for unconditional branch instructions.
Figure B.4-11 Example of accumulator indirect branch addressing (@A)
(This instruction causes an unconditional branch by accumulator indirect branch
JMP @A
addressing.)
Before execution
After execution
❍ Indirect specification branch addressing (@ear)
The address of the branch destination is the word data at the address indicated by ear.
Figure B.4-12 Example of indirect specification branch addressing (@ear)
JMP @@RW0
Before execution
After execution
❍ Indirect specification branch addressing (@eam)
The address of the branch destination is the word data at the address indicated by eam.
Figure B.4-13 Example of indirect specification branch addressing (@eam)
(This instruction causes an unconditional branch by register indirect addressing.)
JMP @RW0
Before execution
After execution
PC 3 C 2 0
A 6 6 7 7
PC 3 B 2 0
A 6 6 7 7
(This instruction causes an unconditional branch by register indirect addressing.)
PC 3 C 2 0
PW0 7 F 4 8
PC 3 B 2 0
PW0 7 F 4 8
PC 3 C 2 0
PW0 3 B 2 0
PC 3 B 2 0
PW0 3 B 2 0
APPENDIX B Instructions
PCB 4 F
Memory space
3 B 2 0 4F3C20H 6 1
4F3B20H
Next instruction
PCB 4 F
3 B 2 0
PCB 4 F
Memory space
DTB 2 1 4F3C21H 0 8
4F3C20H 7 3
4F3B20H
Next instruction
PCB 4 F 217F49H 3 B
217F48H 2 0
DTB 2 1
PCB 4 F
Memory space
4F3C21H 0 0
4F3C20H 7 3
PCB 4 F
4F3B20H
Next instruction
JMP @A
JMP @@RW0
JMP @RW0
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