Overview Of Cpu Specifications - Fujitsu F2MC-16LX Hardware Manual

CHAPTER 2 CPU
2.1

Overview of CPU Specifications

This section gives an overview of the CPU specifications.
I Overview of CPU specifications
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The F MC-16LX CPU core is a 16-bit CPU designed for devices that requires high-speed real-
time processing.
providing high-speed and high-efficiency control processes.
In addition to 16-bit data processing, the F
processing with an installed internal 32-bit accumulator (some instructions perform 32-bit data
processing). Memory spaces are a maximum of 16 MB (expandable) and can be accessed by
using a linear pointer or bank. Based on the F
improved because of increasing the instructions supporting high-level languages, expanding
addressing modes, improving multiply and divide operation instructions, and enhancing bit
processing. The F
❍ Minimum instruction execution time
• 50.0 ns/5 MHz oscillation multiplied by 4 (20 MHz/3.3
• 62.5 ns/4 MHz oscillation multiplied by 4 (16 MHz/3.0
• PLL clock multiply scheme
❍ Maximum memory space: 16 MB, accessing by using a linear pointer or bank
❍ Instruction system optimized for control applications
• Data types available: bit, byte, word, long word
• Standard addressing mode: Use of 23-type, 32-bit accumulator for enhancing high-precision
operation
• Signed multiply and divide operations, expanded RETI instruction
❍ Enhanced interrupt function: 8 priority levels (programmable)
❍ CPU independent automatic transfer function: µ µ µ µ DMA up to 16 channels
❍ Multitasking-compatible instruction system in high-level language (C)
Use of system stack pointers, symmetrical instruction set, and barrel shift instruction
❍ Improved execution speed: 4-byte queue
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The F MC-16LX instruction set is designed for controller applications,
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MC-16LX CPU has the following features:
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MC-16LX CPU core can provide 32-bit data
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MC8 AT architecture, its instruction system is
±
0.3 V for internal operation)
±
0.3 V for internal operation)