Explanation Of Operation Of Address Match Detection Function - Fujitsu F2MC-16LX Hardware Manual

24.4 Explanation of Operation of Address Match Detection
Function
If the addresses of the instructions executed in the program match those set in the
detection address setting registers (PADR0 and PADR1), the address match detection
function will replace the first instruction with the INT9 instruction (01
the interrupt processing program.
I Operation of Address Match Detection Function
Figure 24.4-1 "Operation of Address Match Detection Function" shows the operation of the
address match detection function when the detect addresses are set and an address match is
detected.
Figure 24.4-1 Operation of Address Match Detection Function
The instruction address to be
executed by program matches
detect address setting register 0
I Setting Detect Address
1. Disable the detection address setting register 0 (PADR0) where the detect address is set for
address match detection (PACSR: AD0E = 0).
2. Set the detect address in the detection address setting register 0 (PADR0). Set "FF
higher bits of the detection address setting register 0 (PADR0), "00
"1F " at the lower bits.
H
3. Enable the detect address setting register 0 (PADR0) where the detect address is set for
address match detection (PACSR: AD0E = 1).
I Program Execution
1. If the address of the instruction to be executed in the program matches the set detect
address, the first instruction code at the matched address is replaced by the INT9 instruction
code (01
2. INT9 instruction is executed. INT9 interrupt is generated and then interrupt processing
program is executed.
CHAPTER 24 ADDRESS MATCH DETECTION FUNCTION
Program execution
Address
FF001C :
FF001F :
FF0022 :
).
H
Instruction code Mnemonic
A8 00 00 MOVW
4A 00 00 MOVW
4A 80 08 MOVW
Replaced by INT9 instruction (01
) to branch to
H
RW0, #0000
A, #0000
A, #0880
)
H
" at the
H
" at the middle bits, and
H
457