Fujitsu F2MC-16LX Hardware Manual page 247

Mb90470 series 16-bit microcontroller
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[Bit 5] STOP
This bit is for stopping the counting by the 16-bit free-running timer. If this bit is set to "1", the
timer stops counting, and if it is set to "0", the timer starts counting.
0
Count permit (operation) (initial value)
1
Count prohibit (stop)
If the 16-bit free-running timer stops counting, the output compare operation also stops.
[Bit 4] MODE
This bit specifies the initialize conditions of the 16-bit free-running timer.
If set to "0", the reset and clear bit (bit 3: SCLR) initializes the count value.
If set to "1", the reset and clear bit (bit 3: SCLR), in addition to matching with the compare
clear register (CPCLR) value of the 16-bit free-running timer, initializes the counter value.
0
Initialized by reset and clear bit (initial value)
1
Initialized by reset, clear bit, and compare clear register
The counter value initialization occurs at the point the counter value changes.
[Bit 3] SCLR
This bit is for initializing the value of the 16-bit free-running timer in operation to "0000".
Writing "1" initializes the counter value to "0000". Writing "0" has no effect. The read value is
always "0". The counter value initialization occurs at the point the counter value changes.
0
No effect (initial value)
1
Initializes the counter value to "0000"
If it is initialized, write "0000" to the data register when the timer stops.
[Bits 2, 1, 0] CLK2, CLK1, CLK0
These bits are used to select the count clock of the 16-bit free-running timer. Since the clock
changes after this bit is written, change the bit setting when output compare and input
capture are in the stopped state.
CLK2
CLK1
CLK0
0
0
0
0
0
1
0
1
0
0
1
1
1
0
0
1
0
1
1
1
0
1
1
1
φ φ φ φ = 20MHz
Count clock
φ
50 ns
φ/2
100 ns
φ/4
0.2 µs
φ/8
0.4 µs
φ/16
0.8 µs
φ/32
1.6 µs
φ/64
3.2 µs
φ/128
6.4 µs
CHAPTER 12 16-BIT INPUT/OUTPUT TIMER
φ φ φ φ = 16MHz
φ φ φ φ = 8MHz
0.125 µs
6.25 ns
0.125 µs
0.25 µs
0.25 µs
0.5 µs
0.5 µs
1.0 µs
1.0 µs
2.0 µs
2.0 µs
4.0 µs
4.0 µs
8.0 µs
8.0 µs
16.0 µs
φ φ φ φ = 4MHz
φ φ φ φ = 1MHz
0.25 µs
1.0 µs
0.5 µs
2.0 µs
1.0 µs
4.0 µs
2.0 µs
8.0 µs
4.0 µs
16.0 µs
8.0 µs
32.0 µs
16.0 µs
64.0 µs
32.0 µs
128.0 µs
231

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