Fujitsu F2MC-16LX Hardware Manual page 40

CHAPTER 2 CPU
Figure 2.2-2 Linear addressing (specified with 24-bit operand)
JMPP 123456
Previous program
counter
New program counter
❍ Linear addressing (indirectly specified using 32-bit register)
Figure 2.2-3 "Linear addressing (indirectly specified using 32-bit register)" shows an example of
linear addressing scheme indirectly specified using a 32-bit register.
Figure 2.2-3 Linear addressing (indirectly specified using 32-bit register)
MOV A, @RL1+7
I Addressing type by bank
Bank addressing divides a 16-MB space into 256 banks of 64 KB each, using five bank registers
to specify banks for each space.
• Program bank register (PCB)
• Data bank register (DTB)
• User stack bank register (USB)
• System stack bank register (SSB)
• Additional bank register (ADB)
A 64-KB bank specified with PCB is called the program (PC) space. The PC space includes
such information as instruction codes, vector tables, and immediate data.
A 64-KB bank specified with DTB is called the data (DT) space. The DT space includes writable
data, and internal and external resource control/data registers.
A 64-KB bank specified with USP or SSP is called the stack (SP) space. The SP space is
accessed if a stack access occurs by storing the push/pop instruction or interrupt register. The
stack space to be accessed is determined by the S-flag in the condition code register.
24
H
17 452D
12
3456
XXXX
Old AL
003A
New AL
17452D
H
123456
H
090700
H
+7
RL1
(Upper 8 bits are ignored)
JMPP 123456
H
Next instruction
3A
240906F9