Description Of Extended Intelligent I/O Service (Ei 2 Os) Descriptor (Isd) - Fujitsu F2MC-16LX Hardware Manual

3.7.2 Description of Extended Intelligent I/O service (EI
descriptor (ISD)
The Extended Intelligent I/O service (EI
four types of eight-bit registers:
• Data count register (DCT: 2 bytes)
• I/O register address pointer register (I/OA: 2 bytes)
2
• EI OS status register (ISCS: 1 byte)
• Buffer address pointer register (BAP: 3 bytes)
The initial value of each register is undefined.
I Data count register (DCT)
The data count register (DCT) is a 16-bit register to hold the number of bytes in the data to be
transferred. The DCT register is decremented by 1 whenever each byte of data is transferred.
2
EI OS terminates when the DCT register value becomes "0000
Bit 15 14 13
DCT B15 B14 B13 B12 B11 B10 B09 B08 B07 B06 B05 B04 B03 B02 B01 B00
R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W
R/W: Read-write
X : Undefined
I I/O register address pointer register (I/OA)
The I/O register address pointer register (I/OA) is a 16-bit register that contains the I/O register
lower address (A15 to A0) for data transfer. As the upper address (A23 to A16) is "00
the I/OA register can set I/O addresses from "0000
Figure 3.7-4 Configuration of I/O register address pointer register (I/OA)
Bit 15 14 13
IOA A15 A14 A13 A12 A11 A10 A09 A08 A07 A06 A05 A04 A03 A02 A01 A00
R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W
R/W: Read-write
X : Undefined
2
Figure 3.7-3 Configuration of Data count register (DCT)
DCTH
12 11 10 9 8 7
I/OAH
12 11 10 9 8 7
OS) descriptor (ISD) consists of the following
DCTL
6 5 4 3 2 1
" to "FFFF
H
I/OAL
6 5 4 3 2 1
CHAPTER 3 INTERRUPT
2
OS)
".
H
Initial value
0
XXXXXXXXXXXXXXXX
B
H
".
H
Initial value
0
XXXXXXXXXXXXXXXX
",
B
85