Fujitsu F2MC-16LX Hardware Manual page 595

serial mode register (SMR) .................................. 397
serial programming connection, example of ........ 498
serial shift data register (SDR)............................. 384
serial status register (SSR) .................................. 402
shift operation ...................................................... 390
single chip mode, pin state in............................... 148
single-chip mode (using power from user system),
example of connection in ........................... 499
sleep mode, canceling ......................................... 139
sleep mode, change to......................................... 138
software interrupt operation ................................... 68
software interrupt, note on ..................................... 68
software interrupt, return from................................ 67
software interrupt, start of ...................................... 67
stack area .............................................................. 95
stack operation during return from interrupt
processing ................................................... 95
stack operation when interrupt processing start .... 94
standby mode ...................................................... 129
standby mode by interrupt, cancellation of .......... 153
standby mode, change to..................................... 153
standby mode, operational states in .................... 137
start condition....................................................... 436
start/stop timing.................................................... 390
state transition diagram........................................ 146
state transitions during counter operation............ 322
stop ...................................................................... 291
stop condition....................................................... 436
stop mode, canceling ........................................... 144
stop mode, change to .......................................... 144
STP, SLP, and TMD bit, priority of....................... 135
structure of instruction map.................................. 551
sub-clock mode.................................................... 121
sub-clock stable oscillation wait function ............. 221
switching clock mode ................................... 154, 155
synchronous mode (operation mode 2), operation in
................................................................... 413
system stack pointer (SSP).................................... 30
T
timebase timer control register (TBTC)................ 194
timebase timer interrupt ....................................... 196
timebase timer mode, canceling .......................... 140
timebase timer mode, change to.......................... 140
timebase timer, block diagram of ......................... 192
timebase timer, notes on using ............................ 199
timebase timer, operation of ................................ 200
timebase timer, sample program of ..................... 201
timer control status register (TMCSR) ................. 315
timer counter control status register (TCCS) ........229
timer counter data register (TCDT).......................229
timer function, operation of ...................................285
timer interval .........................................................293
timer operation flow ..............................................294
timer value ............................................................292
timer/pulse width measurement, start and stop of
...................................................................290
timing limit excess flag (DQ5), state transition of
...................................................................481
timing, note on ......................................................307
toggle bit flag (DQ6), state transition of ................480
two-way communication function, communication
procedure for ..............................................416
two-way communication, connection between CPU in
...................................................................415
two-way communication, register setting in..........415
type of instruction .................................................516
U
UART block diagram ............................................395
UART clock selection ...........................................407
UART feature........................................................394
UART program example.......................................421
UART register, list of ............................................396
UART, precautions on using.................................420
up/down count at any width ..................................268
up/down count register 0/1 (UDCR0/1) ................262
up/down timer input enable register (UDER)........188
user stack pointer (USP) ........................................30
W
wacth counter .......................................................220
watch mode, canceling .........................................142
watch mode, change to ........................................142
watch timer control register (WTC), configuration of
...................................................................218
watch timer, block diagram of...............................217
watch timer, function of.........................................216
watch timer, interval interrupt function of..............220
watchdog timer control register (WDTC) ..............206
watchdog timer specifying function, clock source for
...................................................................220
watchdog timer, block diagram of.........................208
watchdog timer, function of...................................204
watchdog timer, note on using..............................212
watchdog timer, operation of ................................210
watchdog timer, sample program for ....................213
write operation ......................................................478
INDEX
579