Notes On Using Watchdog Timer - Fujitsu F2MC-16LX Hardware Manual

Mb90470 series 16-bit microcontroller
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CHAPTER 10 WATCHDOG TIMER

10.5 Notes on Using Watchdog Timer

This section explains notes on using the watchdog timer.
I Notes on using watchdog timer
❍ Stopping the watchdog timer
Once the watchdog timer has started operating, it cannot be stopped unless the power-on
sequence is used or an external reset of watchdog occurs.
❍ Interval time
Because the interval time uses the carry signals of the timebase timer as the count clock, the
interval time of the watchdog timer may become longer than the specified time when the
timebase timer is cleared.
The timebase timer is also cleared by writing "0" to the TBR bit in the timebase timer control
register (TBTC), transition from main clock mode to PLL clock mode, transition from sub-clock
mode to main clock mode and transition from sub-clock mode to PLL clock mode.
❍ Selection of the interval time
The interval time can be specified when the watchdog timer is started. Any data written after the
start of the watchdog timer is ignored.
❍ Caution on preparing programs
When preparing a program that clears the watchdog timer repetitively in the main loop, the main
loop processing time, including interrupt processing, must be less than the minimum interval
time of the watchdog timer.
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