Fujitsu F2MC-16LX Hardware Manual page 12

13.1 Overview ........................................................................................................................................... 250
13.2 Registers for 8/16-bit Up/Down Counter/Timer ................................................................................. 253
13.2.1 Counter control register H0 (CCRH0) .......................................................................................... 254
13.2.2 Counter control register H1 (CCRH1) .......................................................................................... 256
13.2.3 Counter control register L0/1 (CCRL0/1) ..................................................................................... 258
13.2.4 Counter status register 0/1 (CSR0/1) ........................................................................................... 260
13.2.5 Up/down count register 0/1 (UDCR0/1) ....................................................................................... 262
13.2.6 Reload/compare register 0/1 (RCR0/1) ....................................................................................... 263
13.3 8/16-bit Up/Down Counter/Timer Operation ..................................................................................... 264
13.3.1 Reload/compare function ............................................................................................................. 267
13.3.2 Writing data to up/down count register (UDCR) ........................................................................... 270
CHAPTER 14 PWC TIMER .............................................................................................. 273
14.1 Overview of PWC Timer ................................................................................................................... 274
14.2 PWC Timer Registers ....................................................................................................................... 276
14.2.1 PWC Control/Status Register (PWCSR0 to PWCSR2) ............................................................... 277
14.2.2 PWC Data Buffer Register (PWCR0 to PWCR2) ......................................................................... 282
14.2.3 Divide Ratio Control Register (DIVR0 to DIVR2) ......................................................................... 283
14.3 Operations of PWC Timer ................................................................................................................. 284
14.3.1 Operations of the Timer Function ................................................................................................ 285
14.3.2 Operations of the Pulse Width Measurement Function ............................................................... 286
14.3.3 Selection of Count Clock and Operation Mode ............................................................................ 288
14.3.4 Start and Stop of Timer/Pulse Width Measurement ..................................................................... 290
14.3.5 Timer Mode Operation ................................................................................................................. 292
14.3.6 Operation in Pulse Width Measurement Mode ............................................................................ 295
14.4 Notes on PWC Timer Usage ............................................................................................................. 301
CHAPTER 15 µ µ µ µ PG TIMER ............................................................................................... 303
15.1 Overview of µPG Timer ..................................................................................................................... 304
15.2 µPG Timer Registers ........................................................................................................................ 305
15.3 Timing Chart of µPG Timer ............................................................................................................... 307
CHAPTER 16 16-BIT RELOAD TIMER ........................................................................... 309
16.1 Overview of 16-Bit Reload Timer ...................................................................................................... 310
16.1.1 Functions of the 16-Bit Reload Timer .......................................................................................... 311
16.1.2 Block Diagram of the 16-Bit Reload Timer ................................................................................... 313
16.2 16-Bit Reload Timer Registers .......................................................................................................... 314
16.2.1 Timer Control Status Register (TMCSR) ..................................................................................... 315
16.2.2 16-Bit Timer Register (TMR)/16-Bit Reload Register (TMRLR) ................................................... 319
16.3 Operations of the 16-Bit Reload Timer ............................................................................................. 321
16.3.1 State Transitions During Counter Operation ................................................................................ 322
16.3.2 Operations of Internal Clock Mode (Reload Mode) ...................................................................... 323
16.3.3 Internal Clock Mode (One-Shot Mode) ........................................................................................ 325
16.3.4 Event Count Mode ....................................................................................................................... 327
CHAPTER 17 8/16-BIT PPG TIMER ................................................................................ 329
17.1 Overview of 8/16-bit PPG Timer ....................................................................................................... 330
17.1.1 Block Diagram of the 8/16-Bit PPG Timer ................................................................................... 331
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