Input Capture - Fujitsu F2MC-16LX Hardware Manual

CHAPTER 12 16-BIT INPUT/OUTPUT TIMER

12.2.3 Input capture

This module has a function for detecting a rising edge, a falling edge, and both edges
of an externally input signal and for saving the 16-bit free-running timer value to a
register. When an edge is detected, an interrupt may be generated.
I Input capture
Input capture consists of an input capture register and control register. Each input capture has
the corresponding external input pin.
• The valid edge of external input is selected from among 3 types: rising edge, falling edge,
and both edges.
• If a valid edge of the external input is detected, an interrupt may occur.
I Block diagram of input capture
Figure 12.2-13 "Block diagram of input capture" is a block diagram of input capture.
236
Figure 12.2-13 Block diagram of input capture
Capture data register 0
16-bit timer counter value (T15 to T00)
Capture data register 1
Edge detect
EG11 EG10 EG01 EG00
Edge detect
ICP1 ICP0 ICE1 ICE0
IN0
IN1
Interrupt
Interrupt