Fujitsu F2MC-16LX Hardware Manual page 454

2
CHAPTER 22 I C INTERFACE
❍ Interrupt conditions
There is only one interrupt that can be generated related to the I
generated either after the end of the transfer of one byte, or because another predefined
interrupt condition was met.
Since there is only one interrupt, which of multiple interrupt conditions responsible for the
interrupt must be identified by checking flags in the interrupt routine. Possible interrupt
conditions after transfer of one byte has been performed are listed below.
• Interrupt in bus master mode
• Interrupt during slave mode with addressing
• Interrupt after a general call address is received
• "Arbitration lost" occurred
❍ Transfer speed
Note that the maximum transfer speed of the I
clock).
438
2
C bus. The interrupt source is
2
C bus is 100 kHz (the frequency of the serial