Fujitsu F2MC-16LX Hardware Manual page 80

CHAPTER 3 INTERRUPT
❍ A/D interrupt generation
When the A/D converter interrupt processing starts, the interrupt level mask register (ILM) is
automatically set to the same interrupt level (IL2 to IL0 in ICR) as that for the A/D converter (i.e.,
2 in this example). In this example, if an interrupt request of level 1 or 0 is generated, the
interrupt with higher priority is executed first.
❍ End of interrupt processing
If interrupt processing is completed and a return instruction (RETI) is then executed, the values
of the dedicated registers (A, DPR, ADB, DTB, PCB, PC, PS) stored in the stack are returned
and the values of the interrupt level mask register (ILM) are specified to those defined before
the interrupt.
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