Fujitsu F2MC-16LX Hardware Manual page 333

[Bit 4] RELD (Reload operation enable)
This bit is used to enable reload operation. With RELD set to "1", the timer operates in reload
mode. In this mode, the timer loads the reload register data into the counter and continues
counting if an underflow occurs (when the counter value changes from 0000
With RELD set to "0", the timer operates in one-shot mode. If an underflow occurs in this
mode because the counter value changes from 0000
RELD
0 One-shot mode (initial value)
1 Reload mode
[Bit 3] INTE (Timer interrupt request enable)
This bit is used to enable timer interrupt requests. With INTE = 0, no interrupt request is
generated even if UF is set to "1".
INTE
0 Interrupt request output prohibited (initial value)
1 Interrupt request output allowed
[Bit 2] UF (Timer interrupt request flag)
This bit is used as a timer interrupt request flag. If an underflow occurs, UF is set to "1". It is
cleared by writing "0" or by µDMA. Writing "1" has no effect. Read-modify-write instruction
always return "1".
UF
0 No counter underflow (initial value)
1 Counter underflow generated
[Bit 1] CNTE (Timer counter enable)
This bit is used to enable the timer counter.
CNTE
0 Counter stopped (initial value)
1 Counter operation allowed (start trigger wait)
Function
Function
At reading
Function
CHAPTER 16 16-BIT RELOAD TIMER
to FFFF , counter operation stops.
H H
At writing
This bit is cleared (initial value)
No change (no effect on operation)
to FFFF ).
H H
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