Fujitsu F2MC-16LX Hardware Manual page 294

CHAPTER 14 PWC TIMER
Table 14.2-2 Functions related to Read operations (indicating the operation state of the
16-bit up-count timer)
STRT
0
1
• At reset, initialized to 00
• Reading and writing are allowed. However, the meaning of the register contents is different
for write and read operations, as indicated in Table 14.2-1 "Functions related to Write
operations (operation control of 16-bit up-count timer)" and Table 14.2-2 "Functions related
to Read operations (indicating the operation state of the 16-bit up-count timer)".
• The reading value returned in read-modify-write instructions is fixed at 11
• Writing the STRT/STOP bit to start/stop the timer can be performed for individual bits in
order to execute bit operation instructions (bit clear). However, note that no bit operation
instruction is available to read the operation state (the result of reading is always "operation
in progress").
[Bit 13] EDIR (measurement end interrupt request flag)
This bit is a flag that indicates the end of measurement in pulse width measurement. By
setting this bit when measurement end interrupt sources are enabled (bit 12: EDIE = 1), a
measurement end interrupt request is generated.
EDIR
Cause for setting
Cause of clearing
• Initialized to "0" at reset.
• Only reading is allowed.
• Bit values cannot be changed by writing
[Bit 12] EDIE (measurement end interrupt enable)
This bit is used for control of measurement end interrupt requests when pulse width
measurement is performed as shown in the table below.
EDIE
0
1
• Initialized to "0" at reset
• Reading or writing is allowed.
278
STOP
Timer stop mode (not started or end of measurement)
0
(initial value)
1 Timer count operation mode (measurement in progress)
.
B
Set when pulse width measurement ends (when the PWCR contains
the measurement result)
Cleared when the PWCR (measurement result) is read
Measurement end interrupt request output prohibited (no interrupts occur even if
EDIR is set) [initial value]
Measurement end interrupt request output allowed (interrupt occurs if EDIR is set)
Operation control function
Cause of setting or clearing
Operation
for all bit values.
B