Fujitsu F2MC-16LX Hardware Manual page 430

Mb90470 series 16-bit microcontroller

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Table of Contents

CHAPTER 21 UART

❍ Initialization

The appropriate setting values for the control registers when using synchronous mode are

shown below.

[Mode register (SMR)]

MD1 and MD0: "10"

CS2, CS1, CS0: Specify the clock determined by the clock selector.

SCKE: "1" if the dedicated baud rate generator or internal clock is used, "0" when the

external clock is used.

SOE: "1" for sending. "0" for only receiving.

[Control register (SCR)]

P, SBL, A/D: These bits have no effect.

CL: "1" (8-bit data)

REC: "0" (Error flag clear for initialization)

RXE: TXE: Ensure that at least one of RXE and TXE is "1".

[Status Register (SSR)]

RIE: "1" when interrupts are used. "0" if no interrupts are used.

❍ Communication start

Start communication by writing to the Output Data Register (SODR). Note that temporary data

must be written to the SODR before starting communication, even when receiving data.

❍ Communication end

After the end of transmission of one data frame, the RDRF flag of the status register (SSR) is

set to "1". During reception, check the overrun error flag bit (SSR: ORE) and decide whether

communication has been performed normally.