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4. The MSR is set as described in Table 4-4. The new values take effect as the first
instruction of the exception-handler routine is fetched.
Note that MSR[IR) and MSR[DR) are cleared for all exception types; therefore,
address translation is disabled for both instruction fetches and data accesses
beginning with the first instruction of the exception-handler routine.
5. Instruction fetch and execution resumes, using the new MSR value, at a location
specific to the exception type. The location is determined by adding the exception's
vector (see Table 4-2) to the base address determined by MSR[IP).
If
IP is cleared,
exceptions are vectored to the physical address
OxOOOn_nnnn. If
IP is set, exceptions
are vectored to the physical address
OxFFFn_nnnn.
For a machine check exception
that occurs when MSR[ME)
=
0 (machine check exceptions are disabled), the
checkstop state is entered (the machine stops executing instructions). See
Section
4.5.2,
"Machine Check Exception (Ox00200)."
4.3.3 Setting MSR[RI]
An operating system may handle MSR[RI) as follows:
•
In the machine check and system reset exceptions-If MSR[RI) is cleared, the
exception is not recoverable.
If
it is set, the exception is recoverable with respect to
the processor.
• In each exception handler-When enough state information has been saved that a
machine check or system reset exception can reconstruct the previous state, set
MSR[RI).
• In each exception handler-Clear MSR[RI], set SRRO and SRRI appropriately, and
then execute rfi.
• Note that the RI bit being set indicates that, with respect to the processor, enough
processor state data remains valid for the processor to continue, but it does not
guarantee that the interrupted process can resume.
4.3.4 Returning from an Exception Handler
The Return from Interrupt (rfi) instruction performs context synchronization by allowing
previously-issued instructions to complete before returning to the interrupted process. In
general, execution of the rfi instruction ensures the following:
• All previous instructions have completed to a point where they can no longer cause
an exception.
If
a previous instruction causes a direct-store interface error exception,
the results must be determined before this instruction is executed.
Previous instructions complete execution in the context (privilege, protection, and
address translation) under which they were issued.
• The rfi instruction copies SRRI bits back into the MSR.
Instructions fetched after this instruction execute in the context established by this
instruction.
Program execution resumes at the instruction indicated by SRRO
Chapter 4. Exceptions
4-11
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