Table of Contents
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•
Chapter 7, "Signal Descriptions," provides descriptions of individual signals of the
MPC750.
•
Chapter 8, "System Interface Operation," describes signal timings for various
operations. It also provides information for interfacing to the MPC750.
•
Chapter 9, "L2 Cache Interface Operation," describes the implementation and use
of the MPC750 L2 cache and cache controller. Note that this feature is not
supported on the MPC740.
•
Chapter 10, "Power and Thermal Management," provides information about power
saving and thermal management modes for the MPC750.
•
Chapter 11, "Performance Monitor," describes the operation of the performance
monitor diagnostic tool incorporated in the MPC750.
•
Appendix A, "PowerPC Instruction Set Listings," lists all the PowerPC instructions
while indicating those instructions that are not implemented by the MPC750; it also
includes the instructions that are specific to the MPC750. Instructions are grouped
according to mnemonic, opcode, function, and form. Also included is a quick
reference table that contains general information, such as the architecture level,
privilege level, and form, and indicates if the instruction is 64-bit and optional.
•
Appendix B, "Instructions Not Implemented," provides a list of the 32-bit and 64-
bit PowerPC instructions that are not implemented in the MPC750.
• This manual also includes a glossary and an index.
Suggested Reading
This section lists additional reading that provides background for the information in this
manual as well as general information about the PowerPC architecture.
General Information
The following documentation provides useful information about the PowerPC architecture
and computer architecture in general:
xxx
•
The following books are available from the Morgan-Kaufmann Publishers, 340
Pine Street, Sixth Floor, San Francisco, CA 94104; Tel. (800) 745-7323 (U.S.A.),
(415) 392-2665 (International); internet address: mkp@mkp.com.
-
The PowerPC Architecture: A Specification for a New Family of RISC
Processors, Second Edition, by International Business Machines, Inc.
Updates to the architecture specification are accessible via the world-wide web
at http://www.austin.ibm.comltechlppc-chg.html.
-
PowerPC Microprocessor Common Hardware Reference Platform: A System
Architecture, by Apple Computer, Inc., International Business Machines, Inc.,
and Motorola, Inc.
-
Macintosh Technology in the Common Hardware Reference Platform, by Apple
Computer, Inc.
MPC750 RISC Microprocessor User's Manual
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