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PTE Not
Found
Otherwise
Page Address
Translation
(T =0)
: Compare Virtual Address with :
TLB Entries
I
• - - - - - -1-_- - - - _.
TLB
~
--
Miss
- -
Address Translation with
Segment Descriptor
Use EA[O-3] to
Select One of 16 On-Chip
Segment Registers
Direct-Store
Segment Address
(T=1)*
I-Fetch with N-Bit Set in
Segment Descriptor
(No-Execute)
DSIlISI Exception
- - THLB
(See Figure 5-8)
It - __
(See Figure 5-9)
PTE Found
. ___ 1 ___ .
I
Load TLB Entry
Access
Permitted
Continue Access to
Memory Subsystem
Access
Protected
Access Faulted
- - - - Optional to the PowerPC architecture. Implemented in the MPC750.
'In the case
01
instruction accesses,
causes lSI exception
Figure 5-6. General Flow of Page and Direct-Store Interface Address Translation
Chapter 5. Memory Management
5-15
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