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Table 9-1. L2 Cache Control Register (Continued)
Bit
Name
Function
18
L2BYP
L2 DLL bypass. L2BYP is intended for use when the PLL is being bypassed, and for
engineering evaluation.
19-30
-
Reserved. These bits should be cleared to
o.
31
L21P
L2 global invalidate in progress (read only)-This read-only bit indicates whether an L2
global invalidate is occurring.
9.1.3 L2 Cache Initialization
Following a power-on or hard reset, the L2 cache and the L2 DLL are disabled initially.
Before enabling the L2 cache, the L2 DLL must first be configured through the L2CR
register, and the DLL must be allowed 640 L2 clock periods to achieve phase lock. Before
enabling the L2 cache, other configuration parameters must be set in the L2CR, and the L2
tags must be globally invalidated. The L2 cache should be initialized during system start-
up.
The sequence for initializing the L2 cache is as follows:
9-6
•
Power-on reset (automatically performed by the assertion ofHRESET signal).
•
Disable L2 cache by clearing L2 CR[L2E].
•
Set the L2CR[L2CLK] bits to the desired clock divider setting. Setting a nonzero
value automatically enables the DLL. All other L2 cache configuration bits should
be set to properly configure the L2 cache interface for the SRAM type, size, and
interface timing required.
•
Wait for the L2 DLL to achieve phase lock. This can be timed by setting the
decrementer for a time period equal to 640 L2 clocks, or by performing an L2 global
invalidate.
•
Perform an L2 global invalidate. The global invalidate could be performed before
enabling the DLL, or in parallel with waiting for the DLL to stabilize. Refer to
Section 9.1.4, "L2 Cache Global Invalidation," for more information about L2 cache
global invalidation. Note that a global invalidate always takes much longer than it
takes for the DLL to stabilize.
•
After the DLL stabilizes, an L2 global invalidate has been performed, and the other
L2 configuration bits have been set, enable the L2 cache for normal operation by
setting the L2CR[L2E] bit to 1.
MPC750 RISC Microprocessor User's Manual
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