Reserved Instmction Class - Motorola MPC750 User Manual

Risc
Hide thumbs Also See for MPC750:
Table of Contents

Advertisement

Instructions defined in the PowerPC architecture but not implemented in a specific
PowerPC implementation. For example, instructions that can be executed on 64-bit
PowerPC processors are considered illegal by 32-bit processors such as the
MPC750.
The following primary opcodes are defined for 64-bit implementations only and are
illegal on the MPC750:
2,30,58,62
All unused extended opcodes are illegal. The unused extended opcodes can be
determined from information in Section A.2, "Instructions Sorted by Opcode," and
Section 2.3.1.4, "Reserved Instruction Class." Notice that extended opcodes for
instructions defined only for 64-bit implementations are illegal in 32-bit
implementations, and vice versa. The following primary opcodes have unused
extended opcodes.
17,19,31,59,63 (Primary opcodes 30 and 62 are illegal for all 32-bit
implementations, but as 64-bit opcodes they have some unused extended opcodes.)
An instruction consisting of only zeros is guaranteed to be an illegal instruction. This
increases the probability that an attempt to execute data or uninitialized memory
invokes the system illegal instruction error handler (a program exception). Note that
if only the primary opcode consists of all zeros, the instruction is considered a
reserved instruction, as described in Section 2.3.1.4, "Reserved Instruction Class."
The MPC750 invokes the system illegal instruction error handler (a program exception)
when it detects any instruction from this class or any instructions defined only for 64-bit
implementations.
See Section 4.5.7, "Program Exception (Ox00700)," for additional information about illegal
and invalid instruction exceptions. Except for an instruction consisting of binary zeros,
illegal instructions are available for additions to the PowerPC architecture.
2.3.1.4 Reserved Instruction Class
Reserved instructions are allocated to specific implementation-dependent purposes not
defined by the PowerPC architecture. Attempting to execute an unimplemented reserved
instruction invokes the illegal instruction error handler (a program exception). See
"Program Exception (Ox00700)," in Chapter 6, "Exceptions," in The Programming
Environments Manual for information about illegal and invalid instruction exceptions.
The PowerPC architecture defines four types of reserved instructions:
Instructions in the POWER architecture not part of the PowerPC UISA. For details
on POWER architecture incompatibilities and how they are handled by PowerPC
processors, see Appendix B, "POWER Architecture Cross Reference," in The
Programming Environments Manual.
Implementation-specific instructions required for the processor to conform to the
PowerPC architecture (none of these are implemented in the MPC750)
2-34
MPC750 RISC Microprocessor User's Manual

Advertisement

Table of Contents
loading

Table of Contents