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Table A-23. Condition Register
Logical Instructions
Name
0
5
6
7
8
9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31
erand
19
crbD
crbA
crbB
257
erande
19
crbD
crbA
crbB
129
ereqv
19
crbD
crbA
crbB
289
ernand
19
crbD
crbA
crbB
225
ernor
19
crbD
crbA
crbB
33
eror
19
crbD
crbA
crbB
449
erore
19
crbD
crbA
crbB
417
erxor
19
crbD
crbA
crbB
193
merf
19
crfD
Table A-24. System Linkage Instructions
Name
0
5
6
7
8
9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 242526 2728 29 30 31
rfi
1,2
19
rfid
1,3
19
se
17
Notes:
1
Supervisor-level instruction
2
Optional 64-bit bridge instruction
3 64-bit instruction
Table A-25. Trap Instructions
Name
0
5
6
7
8
9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31
31
TO
A
B
I
68
f;l~
03
TO
A
SIMM
tw
31
TO
A
B
I
4
I~~i
twi
03
TO
A
SIMM
Note:
1
64-bit instruction
A-26
MPC750 RISC Microprocessor User's Manual
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