Table of Contents
Advertisement
10.3.2 Thermal Assist Unit Operation
The TAU can be programmed to operate in single or dual threshold modes, which results in
the TAU generating a thermal management interrupt when one or both threshold values are
crossed. In addition, with the appropriate software routine, the TAU can also directly
determine the junction temperature. The following sections describe the configuration of
the TAU to support these modes of operation.
10.3.2.1 TAU Single Threshold Mode
When the TAU is configured for single threshold mode, either THRMI or THRM2 can be
used to contain the threshold value, and a thermal management interrupt is generated when
the threshold value is crossed. To configure the TAU for single threshold operation, set the
desired temperature threshold, TID, TIE, and V bits for either THRMI or THRM2. The
unused THRMn threshold SPR should be disabled by clearing the V bit to O. In this
discussion THRMn refers to the THRM threshold SPR (THRMI or THRM2) selected to
contain the active threshold value.
After setting the desired operational parameters, the TAU is enabled by setting the
THRM3[E] bit to
1,
and placing a value allowing a sample interval of 20 microseconds or
greater in the THRM3[SITV] field. The THRM3[SITV] setting determines the number of
processor clock cycles between input to the DAC and sampling of the comparator output;
accordingly, the use of a value smaller than recommended in the THRM3[SITV] field can
cause inaccuracies in the sensed temperature.
If the junction temperature does not cross the programmed threshold, the THRMn[TIN] bit
is cleared to 0 to indicate that no interrupt is required, and the THRMn[TIV] bit is set to 1
to indicate that the TIN bit state is valid. If the threshold value has been crossed, the
THRMn[TIN]
and THRMn[TIV] bits are set to 1, and a thermal management interrupt is
generated if both the THRMn[TIE] and MSR[EE] bits are set to 1.
A thermal management interrupt is held asserted internally until recognized by the
MPC750's interrupt unit. Once a thermal management interrupt is recognized, further
temperature sampling is suspended, and the THRMn[TIN] and THRMn[TIV] values are
held until an mtspr instruction is executed to THRMn.
The execution of an mtspr instruction to THRMn anytime during TAU operation will clear
the THRMn[TIV] bit to 0 and restart the temperature comparison. Executing an mtspr
instruction to THRM3 will clear both THRMI [TIV] and THRM2[TIV] bits to 0, and restart
temperature comparison in THRMn if the THRM3 [E] bit is set to 1.
Examples of valid THRMI and THRM2 bit settings are shown in Table 10-4.
10-8
MPC750 RISC Microprocessor User's Manual
Advertisement
Table of Contents
