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Table 7-2. MPC750 Snoop Hit Response (Continued)
60x Bus Specification
MPC750Bus
Transaction
TTO
TT1
TT2
TT3
TT4
Snooper;
Command
Action on Hit
Write-with-flush-atomic
Single-beat write
1
0
0
1
0
Flush, cancel
reservation
Reserved
N/A
1
0
1
1
0
N/A
Read-atomic
Single-beat read or burst
1
1
0
1
0
Clean or flush
Read-with-intent-to mOdify-
Burst
1
1
1
1
0
Flush
atomic
Reserved
-
0
0
0
1
1
N/A
Reserved
-
0
0
1
1
1
N/A
Read-with-no-intent-to-cache
Single-beat read or burst
0
1
0
1
1
Clean
Reserved
-
0
1
1
1
1
N/A
Reserved
-
1
X
X
1
1
N/A
7.2.4.2 Transfer Size (TSIZ[O-2])-Output
Following are the state meaning and timing comments for the transfer size (TSIZ[O-2])
output signals on the MPC750.
State Meaning
AssertedlNegated-For memory accesses, these signals along with
TBST, indicate the data transfer size for the current bus operation, as
shown in Table 7-3. Table 8-3 shows how the transfer size signals are
used with the address signals for aligned transfers. Table 8-4 shows
how the transfer size signals are used with the address signals for
misaligned transfers. Note that the MPC750 does not generate all
possible TSIZ[O-2] encodings.
For external control instructions (eciwx and ecowx), TSIZ[0--2] are
used to output bits 29-31 of the external access register (EAR),
which are used to form the resource ID (TBSTIITSIZO-TSIZ2).
Timing Comments AssertionlNegation-The same asA[O-31].
High Impedance-The same as A[0--31].
Table 7-3. Data Transfer Size
TBST
TSIZ[O-2]
Transfer Size
Asserted
010
Burst (32 bytes)
Negated
000
8 by1es
Negated
001
1 by1e
Negated
010
2 by1es
Negated
011
3 by1es
Chapter 7. Signal Descriptions
7-11
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