Status Register (Msr) - Motorola DigitalDNA MPC180E User Manual

Security processor
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Operational Registers

6.1.3 Status Register (MSR)

The status register contains bits that give information about the state of the MDEU. Upon
completion of a hash, DONE is asserted in bit 0 of MSR, followed by an interrupt on IRQ
if interrupts are enabled. In addition, whenever the contents of the message buffer are
copied for internal hash processing, BE is asserted. Assertion of BE will cause an interrupt
only if interrupts are enabled and buffer-empty interrupt is enabled (MCR:BIE is asserted).
Address Error (AE) is asserted by addressing MDEU but not specifying a valid address
within MDEU.
The MSR is effectively a read-only register. Its contents cannot be modified by the host
processor except to be reset, which occurs when the host processor performs a write to the
MSR, regardless of the data value.
Figure 6-2 shows the MDEU status register and Table 6-3 describes this register's fields.
0
Field
Reset
R/W
16
Field
Reset
R/W
Addr
Bits
Name
0–27
28
IRQ
29
AE
30
BE
31
DONE
6-4
PRELIMINARY—SUBJECT TO CHANGE WITHOUT NOTICE
0000_0000
0000_0000
Figure 6-2. MDEU Status Register (MSR)
Table 6-3. MSR Field Descriptions
Reserved, should be cleared.
0 interrupt not indicated
1 interrupt indicated
0 address error not detected
1 address error detected
0 message buffer not empty
1 message buffer empty
0 hash not completed
1 hash completed
MPC180E Security Processor User's Manual
R/W
27
R/W
0x016
Description
15
28
29
30
31
IRQ
AE
BE DONE

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