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5.1.4 Memory Protection Facilities
In addition to the translation of effective addresses to physical addresses, the MMUs
provide access protection of supervisor areas from user access and can designate areas of
memory as read-only as well as no-execute or guarded. Table 5-2 shows the protection
options supported by the MMUs for pages.
Table 5-2. Access Protection Options for Pages
Option
Supervisor-only
Supervisor-only-no-execute
Supervisor-write-only
Supervisor-write-only-no-execute
Both (user/supervisor)
Both (user-/supervisor) no-execute
Both (user-/supervisor) read-only
Both (user/supervisor)
read-only-no-execute
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Access permitted
-
Protection violation
User Read
I-Fetch
Data
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-
-
-
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-
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-
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User
Supervisor Read
Write
I-Fetch
Data
-
.J
.J
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-
.J
-
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-
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-
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Supervisor
Write
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-
-
The no-execute option provided in the segment register lets the operating system program
determine whether instructions can be fetched from an area of memory. The remaining
options are enforced based on a combination of information in the segment descriptor and
the page table entry. Thus, the supervisor-only option allows only read and write operations
generated while the processor is operating in supervisor mode (MSR[PR] = 0) to access the
page. User accesses that map into a supervisor-only page cause an exception.
Finally, a facility in the VEA and OEA allows pages or blocks to be designated as guarded,
preventing out-of-order accesses that may cause undesired side effects. For example, areas
of the memory map used to control I/O devices can be marked as guarded so accesses do
not occur unless they are explicitly required by the program.
For more information on memory protection, see "Memory Protection Facilities,"
III
Chapter 7, "Memory Management," in the The Programming Environments Manual.
Chapter 5. Memory Management
5-11
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