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The MPC750 can execute instructions out-of-order, but in-order completion by the
completion unit ensures a precise exception mechanism. Program-related exceptions are
signaled when the instruction causing the exception reaches the last position in the
completion queue. Prior instructions are allowed to complete before the exception is taken.
6.3.3.1 Rename Register Operation
To avoid contention for a given register file location in the course of out-of-order execution,
the MPC750 provides rename registers for holding instruction results before the
completion commits them to the architected register. There are six GPR rename registers,
six FPR rename registers, and one each for the CR, LR, and CTR.
When the dispatch unit dispatches an instruction to its execution unit, it allocates a rename
register (or registers) for the results of that instruction. If an instruction is dispatched to a
reservation station associated with an execution unit due to a data dependency, the
dispatcher also provides a tag to the execution unit identifying the rename register that
forwards the required data at completion. When the source data reaches the rename register,
execution can begin.
Instruction results are transferred from the rename registers to the architected registers by
the completion unit when an instruction is retired from the completion queue without
exceptions and after any predicted branch conditions preceding it in the completion queue
have been resolved correctly. If a branch prediction was incorrect, the instructions
following the branch are flushed from the completion queue, and any results of those
instructions are flushed from the rename registers.
6.3.3.2 Instruction Serialization
Although the MPC750 can dispatch and complete two instructions per cycle, so-called
serializing instructions limit dispatch and completion to one instruction per cycle. There are
three types of instruction serialization:
•
Execution serialization-Execution-serialized instructions are dispatched, held in
the functional unit and do not execute until all prior instructions have completed. A
functional unit holding an execution-serialized instruction will not accept further
instructions from the dispatcher. For example, execution serialization is used for
instructions that modify nonrenamed resources. Results from these instructions are
generally not available or forwarded to subsequent instructions until the instruction
completes (using mtspr to write to LR or CTR does provide forwarding to branch
instructions).
•
Completion serialization (also referred to as post-dispatch or tail serialization)-
Completion-serialized instructions inhibit dispatching of subsequent instructions
until the serialized instruction completes. Completion serialization is used for
instructions that bypass the normal rename mechanism.
•
Refetch serialization (flush serialization)-Refetch-serialized instructions inhibit
dispatch of subsequent instructions and force refetching of subsequent instructions
after completion.
Chapter 6. Instruction Timing
6-17
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