Fujitsu F2MC-16LX Hardware Manual page 304

CHAPTER 18 I/O EXTENDED SERIAL INTERFACE
[bit12] SIE (Serial I/O interrupt enable)
The SIE bit controls an interrupt request from the serial I/O as shown in Table 18.2-2.
This bit is readable and writable.
Table 18.2-2 Function of SIE (Serial I/O Interrupt Request Control Bit)
SIE
0
1
[bit11] SIR (Serial I/O interrupt request)
The SIR bit is set to "1" when a transfer of serial data terminated. When an interrupt is
allowed (SIE = 1), if this bit becomes "1", an interrupt request to the CPU is generated. The
clear conditions depend on the MODE bit. When the MODE bit is "0", the interrupt is cleared
by writing "0" to the SIR bit; and when the MODE bit is "1", it is cleared by a read or write
operation to the SDR register.
Also, it is cleared, regardless of the MODE bit, by a reset or writing 1 to the STOP bit.
It is ineffectual to write 1 to this bit. When it is read with a read-modify-write instruction, the
read-out is always "1".
[bit10] BUSY
The BUSY bit indicates whether a serial transfer is in progress. This bit is read only.
Table 18.2-3 Function of BUSY Bit
BUSY
0
1
[bit9] STOP
The STOP bit forcefully stops the serial transfer.
Setting "1" to this bit causes the stop state.
This bit is readable and writable.
Table 18.2-4 Function of STOP Bit
STOP
0
1
[bit8] STRT
The STRT bit executes a serial transfer. Writing "1" to this bit under the suspend state starts
a transfer. However, during a serial transfer operation or under the serial shift register R/W
wait state, writing "1" is ignored. Writing "0" is ignored.
When this bit is read, the read-out is always "0".
288
Prohibits the serial I/O interrupts. [Initial value]
Allows the serial I/O interrupts.
Indicates the suspend or serial data register R/W wait state [Initial value]
Indicates the serial transfer state
Normal operation
Transfer stopped [Initial value]
Function
Function
Function