Fujitsu F2MC-16LX Hardware Manual page 441

Mb90550a/b series, 16-bit
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Table B.8-12 18 Shift Instructions (Byte, Word, Long Word)
Mnemonic
#
RORC
A
2
ROLC
A
2
RORC
ear
2
RORC
eam
2+
5+(a)
ROLC
ear
2
ROLC
eam
2+
5+(a)
ASR
A,R0
2
LSR
A,R0
2
LSL
A,R0
2
ASRW
A
1
LSRW
A/SHRW A
1
LSLW
A/SHLW A
1
ASRW
A,R0
2
LSRW
A,R0
2
LSLW
A,R0
2
ASRL
A,R0
2
LSRL
A,R0
2
LSLL
A,R0
2
*1: 6 when R0 is 0; otherwise, 5 + (R0)
*2: 6 when R0 is 0; otherwise, 6 + (R0)
Note:
See Table B.5-1 and Table B.5-2 for information on (a) to (d) in the table.
RG
B
~
2
0
0
byte (A) ← With right rotation carry
2
0
0
byte (A) ← With left rotation carry
byte (ear) ← With right rotation carry
3
2
0
byte (eam) ← With right rotation carry
0
2 x (b)
byte (ear) ← With left rotation carry
3
2
0
byte (eam) ← With left rotation carry
0
2 x (b)
byte (A) ← Arithmetic right shift (A, 1 bit)
*1
1
0
byte (A) ← Logical right barrel shift (A, R0)
*1
1
0
byte (A) ← Logical left barrel shift (A, R0)
*1
1
0
word (A) ← Arithmetic right shift (A, 1 bit)
2
0
0
word (A) ← Logical right shift (A, 1 bit)
2
0
0
word (A) ← Logical left shift (A, 1 bit)
2
0
0
*1
1
0
word (A) ← Arithmetic right barrel shift (A, R0)
*1
1
0
word (A) ← Logical right barrel shift (A, R0)
word (A) ← Logical left barrel shift (A, R0)
*1
1
0
*2
1
0
long (A) ← Arithmetic right barrel shift (A, R0)
*2
1
0
long (A) ← Logical right barrel shift (A, R0)
long (A) ← Logical left barrel shift (A, R0)
*2
1
0
Operation
LH
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
APPENDIX B Instructions
AH
I
S
T
N
Z
V
C
-
-
-
-
*
*
-
*
-
-
-
-
*
*
-
*
-
-
-
-
*
*
-
*
-
-
-
-
*
*
-
*
-
-
-
-
*
*
-
*
-
-
-
-
*
*
-
*
-
-
-
-
*
*
-
*
-
-
-
-
*
*
-
*
-
-
-
-
*
*
-
*
-
-
-
*
*
*
-
*
-
-
-
*
R
*
-
*
-
-
-
-
*
*
-
*
-
-
-
*
*
*
-
*
-
-
-
*
*
*
-
*
-
-
-
-
*
*
-
*
-
-
-
*
*
*
-
*
-
-
-
*
*
*
-
*
-
-
-
-
*
*
-
*
RMW
-
-
-
*
-
*
-
-
-
-
-
-
-
-
-
-
-
-
425

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