Fujitsu F2MC-16LX Hardware Manual page 255

Table 15.2-4 Start Channel of the ANS2, ANS1, and ANS0 Bits
ANS2 ANS1
0 0
0 0
0 1
0 1
1 0
1 0
1 1
1 1
Note:
During A/D conversion, these bits can read conversion channel numbers.
conversion is stopped, however, channel numbers previously converted by the A/D are read.
The value read by this bit is the conversion channel number until A/D conversion is started.
This value is initialized to "000" at reset.
[bit2 to bit0] ANE2, ANE1, and ANE0 (Analog end channel set)
The end channel of A/D conversion is set by ANE2, ANE1, and ANE0 bits.
Table 15.2-5 End Channel of ANE2, ANE1, and ANE0 bits
ANE2 ANE1
0 0
0 0
0 1
0 1
1 0
1 0
1 1
1 1
Notes:
• Setting the same channel as ANS2 to ANS0 selects one-channel conversion. (Single
conversion)
• When successive mode or pause mode is set, the conversion returns to the start channel
set by ANS2 to ANS0 upon completed conversion of channels set by these bits.
• When the channels set are ANS > ANE, conversion starts at ANS. When channels up to
channel 7 are converted, the A/D returns to channel 0 and converts until ANE.
Example: Channel setting ANS = 6ch and ANE = 3ch in single mode
Operation Conversion channel 6ch --> 7ch --> 0ch --> 1ch --> 2ch --> 3ch
15.2 Resisters of the A/D Converter
ANS0
0 AN0 [Initial value]
1 AN1
0 AN2
1 AN3
0 AN4
1 AN5
0 AN6
1 AN7
ANE0
0
1
0
1
0
1
0
1
Start channel
While A/D
End channel
AN0 [Initial value]
AN1
AN2
AN3
AN4
AN5
AN6
AN7
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