16-Bit Input Capture Operations - Fujitsu F2MC-16LX Hardware Manual

10.6 16-Bit Input Capture Operations

When detecting the specified valid edge, the 16-bit input capture can take a 16-bit free-
run timer value in the capture register to generate an interrupt.
■ 16-bit Input Capture Operations
Figure 10.6-1 shows an example of the input capture take-in timings for 0ch. Other channels
also perform the same operation.
Counter value
FFFF
H
BFFF
H
Common
7FFF
H
to (1), (2),
and (3)
3FFF
H
0000
H
Reset
IN0
Input capture
data register 0
(1)
ICP0 capture 0
interrupt
IN0
Input capture
data register 0
(2)
ICP0 capture
1 interrupt
IN0
Input capture
data register 0
(3)
ICP0 capture
interrupt
Figure 10.6-1 Example of Input Capture Take-in Timings
3FFF
Undefined
Undefined
Undefined
(1) For EG01 = 0, EG00 = 1
(2) For EG01 = 1, EG00 = 0
(3) For EG01 = 1, EG00 = 1
10.6 16-Bit Input Capture Operations
H
BFFF
H
7FFF
H
3FFF
H
Time
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