Fujitsu F2MC-16LX Hardware Manual page 406

Mb90550a/b series, 16-bit
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APPENDIX A I/O MAP
Table A-1 I/O Map (7/8)
Address
A8
Watchdog control register
H
A9
Time-based timer control register
H
AA
to
H
AD
H
AE
Flash memory control status register
H
AF
H
B0
Interrupt control register 00
H
B1
Interrupt control register 01
H
B2
Interrupt control register 02
H
B3
Interrupt control register 03
H
B4
Interrupt control register 04
H
B5
Interrupt control register 05
H
B6
Interrupt control register 06
H
B7
Interrupt control register 07
H
B8
Interrupt control register 08
H
B9
Interrupt control register 09
H
BA
Interrupt control register 10
H
BB
Interrupt control register 11
H
BC
Interrupt control register 12
H
BD
Interrupt control register 13
H
BE
Interrupt control register 14
H
BF
Interrupt control register 15
H
C0
to
H
FF
H
100
to
H
#
H
#
to
H
1FEF
H
390
Register
Abbreviation
Access
WDTC
R/W!
TBTC
R/W!
Not available
FMCS
R/W
Not available
ICR00
R/W!
ICR01
R/W!
ICR02
R/W!
ICR03
R/W!
ICR04
R/W!
ICR05
R/W!
ICR06
R/W!
ICR07
R/W!
ICR08
R/W!
ICR09
R/W!
ICR10
R/W!
ICR11
R/W!
ICR12
R/W!
ICR13
R/W!
ICR14
R/W!
ICR15
R/W!
External area
RAM area
Reserved area
Peripheral
Initial value
Watchdog
XXXXX111
timer
Time-base
1--00100
timer
Flash
memory
00000--0
interface
circuit
00000111
00000111
00000111
00000111
00000111
00000111
00000111
00000111
Interrupt
controller
00000111
00000111
00000111
00000111
00000111
00000111
00000111
00000111
B
B
B
B
B
B
B
B
B
B
B
B
B
B
B
B
B
B
B

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