Fujitsu F2MC-16LX Hardware Manual page 83

Figure 3.5-1 Occurrence and Release of Hardware Interrupts
2
F
Save
The meanings of the items (1) to (3) in Figure 3.5-1 are as follows:
(1) The software interrupt instruction is executed.
(2) The internal special CPU register defined by the register file is saved according to the
microcode for the software interrupt instruction.
(3) The interrupt processing ends by the RETI instruction in the user's interrupt processing
routine.
■ Notes on Software Interrupts
If the program bank register (PCB) is FF
the table of the INT #vct8 instruction. When designing software, be sure that the CALLV
instruction never uses the same address as the INT #vct8 instruction.
Register file
(2)
Microcode
IR
M C - 1 6 LX C P U
RAM
(1)
PS I S
B unit
Fetch
Queue
Instruction bus
, the vector area of the CALLV instruction overlaps to
H
3.5 Software Interrupts
PS: Processor status
I: Interrupt permission flag
S:
Stack flag
IR: Instruction register
B unit: Bus interface unit
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