Block Diagrams Of The 8-Bit Ppg - Fujitsu F2MC-16LX Hardware Manual

12.2 Block Diagrams of the 8-Bit PPG

Figure 12.2-1 shows a block diagram of the 8-bit PPG (ch.0/ch.2/ch.4), and Figure 12.2-
2 shows a block diagram of the 8-bit PPG (ch.1/ch.3/ch.5).
■ Block Diagrams of the 8-bit PPG
Figure 12.2-1 Block Diagram of the 8-bit PPG (ch.0/ch.2/ch.4)
Machine clock divided by 16
Machine clock divided by 8
Machine clock divided by 4
Machine clock divided by 2
Machine clock
Count clock
selection
Time-based timer output
(oscillation clock
divided by 512)
L/H
PPG0/2/4
output latch
Inversion Clear
PCNT (down counter)
Reload
L/H selector
PRLL0/2/4
PRLH0/2/4
12.2 Block Diagrams of the 8-Bit PPG
PPG0/2/4 output enabled
PEN0/2/4
S
R Q
ch.1/ch.3/ch.5: Borrow
PRLBH0/2/4
PIE0
PUF0
PPGC0/2/4
(Operation mode control)
PPG0/2/4
IRQ
Lower Data Bus
Higher Data Bus
195