Fujitsu F2MC-16LX Hardware Manual page 85

Figure 3.6-1 Overview of the Expanded Intelligent I/O Service
by IOA
CPU
by BAP
■ Configuration of the Expanded Intelligent I/O Service (EI
The mechanism of the EI
❍ Built-in resources
Interrupt enable bit and interrupt request bit: Control interrupt requests from resources.
❍ Interrupt controller
ICR: Assigns levels to interrupts, determines a priority of simultaneously requested interrupts,
and selects EI
❍ CPU
I and ILM: Compare the requested interrupt level against the current level and determine the
status of interrupt capability.
Microcode: Notes the steps for EI
❍ RAM
Descriptor: Describes the transfer information for the EI
Memory space
I/O register
(3)
ISD
(3)
(4)
Buffer
Notes:
- The area that can be specified by IOA is 000000
- The area that can be specified by BAP is 000000
- The maximum number of transfers that can be specified in DCT is 65536.
2
OS consists of the following four parts:
2
OS operation.
3.6 Expanded Intelligent I/O Service (EI
.....................
I/O register
Interrupt request
by ICS
(2)
Interrupt control register
Interrupt controller
(1) The I/O system requests a transfer.
(2) The interrupt controller selects a descriptor.
(3) The transfer source and destination are read from
the descriptor.
by
(4) Data is transferred between the I/O and the memory.
DCT
(5) The interrupt factor is automatically cleared.
to 00FFFF
H
to FFFFFF
H
2
OS)
2
OS step
2
OS.
Peripheral
(1)
.
H
.
H
2
OS)
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