Registers Of The I C Interface - Fujitsu F2MC-16LX Hardware Manual

Mb90550a/b series, 16-bit
Hide thumbs Also See for F2MC-16LX:
Table of Contents

Advertisement

19.3 Registers of the I
2
The I
C interface has the following six types of registers:
• Bus status register
• Bus control register
• Clock control register
• Address register
• Data register
• Port selection register
2
■ Registers of the I
C Interface
Bus status register
Address:
ch .0 00002C
ch.1 000032
Bus control register
Address:
ch .0 00002D
ch.1 000033
Clock control register
Address:
ch .0 00002E
ch.1 000034
Read/write
Initial value
Address register
Address:
ch.0 00002F
ch.1 000035
Data register
ch .0 000030
Address:
ch.1 000036
Read/write
Initial value
Port selection register
Address:
ch.1 000037
Read/write
Initial value
2
C Interface
Figure 19.3-1 Registers of the I
7
6
bit
H
BB
RSC
H
Read/write
(R)
(R)
Initial value
( 0)
( 0)
15
14
bit
H
BER BEIE
H
Read/write
(R/W) (R/W) (R/W) (R/W) (R/W) (R/W) (R/W) (R/W)
Initial value
( 0)
( 0)
7
6
bit
H
H
(-)
(-)
(-)
(-)
15
14
bit
H
A6
H
Read/write
(-)
(R/W) (R/W) (R/W) (R/W) (R/W) (R/W) (R/W)
Initial value
(-)
(X)
7
6
bit
H
D7
D6
H
(R/W) (R/W) (R/W) (R/W) (R/W) (R/W) (R/W) (R/W)
(X)
(X)
15
14
bit
H
(-)
(-)
(-)
(-)
2
C Interface
5
4
2
3
AL
LRB
TRX
AAS
(R)
(R)
(R)
(R)
( 0)
( 0)
( 0)
( 0)
13
12
11
10
MSS
ACK GCAA INTE
SCC
( 0)
( 0)
( 0)
( 0)
( 0)
5
4
2
3
EN
CS4
CS3
CS2
(R/W) (R/W) (R/W) (R/W) (R/W) (R/W)
( 0)
(X)
(X)
(X)
(X)
13
12
11
10
A5
A4
A3
A2
(X)
(X)
(X)
(X)
5
4
2
3
D5
D4
D3
D2
(X)
(X)
(X)
(X)
(X)
13
12
11
10
(-)
(-)
(-)
(-)
(-)
(-)
(-)
(-)
(-)
(-)
19.3 Registers of the I
1
0
GCA
FBT
IBSR
(R)
(R)
( 0)
( 0)
9
8
INT
IBCR
( 0)
1
0
CS1
CS0
ICCR
(X)
9
8
A1
A0
IADR
(X)
(X)
1
0
D1
D0
IDAR
(X)
9
8
PSEL
ISEL
(R/W)
( 0)
2
C Interface
305

Advertisement

Table of Contents
loading

Table of Contents