Appendix A I/O Map - Fujitsu F2MC-16LX Hardware Manual

Mb90550a/b series, 16-bit
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APPENDIX A I/O MAP

APPENDIX A I/O MAP
Addresses are allocated to registers of each peripheral circuit of the microcontroller.
■ I/O Map
Table A-1 I/O Map (1/8)
Address
00
Port 0 data register
H
01
Port 1 data register
H
02
Port 2 data register
H
03
Port 3 data register
H
04
Port 4 data register
H
05
Port 5 data register
H
06
Port 6 data register
H
07
Port 7 data register
H
08
Port 8 data register
H
09
Port 9 data register
H
0A
Port A data register
H
0B
to
H
0F
H
10
Port 0 data direction register
H
11
Port 1 data direction register
H
12
Port 2 data direction register
H
13
Port 3 data direction register
H
14
Port 4 data direction register
H
15
H
16
Port 6 data direction register
H
17
Port 7 data direction register
H
18
Port 8 data direction register
H
19
Port 9 data direction register
H
1A
Port A data direction register
H
1B
Port 4 output pin register
H
384
Register
Abbreviation
Access
PDR0
R/W
PDR1
R/W
PDR2
R/W
PDR3
R/W
PDR4
R/W
PDR5
R/W
PDR6
R/W
PDR7
R/W
PDR8
R/W
PDR9
R/W
PDRA
R/W
Not available
DDR0
R/W
DDR1
R/W
DDR2
R/W
DDR3
R/W
DDR4
R/W
Not available
DDR6
R/W
DDR7
R/W
DDR8
R/W
DDR9
R/W
DDRA
R/W
ODR4
R/W
Peripheral
Initial value
Port 0
XXXXXXXX
Port 1
XXXXXXXX
Port 2
XXXXXXXX
Port 3
XXXXXXXX
Port 4
XXXXXXXX
Port 5
--111111
Port 6
XXXXXXXX
Port 7
XXXXXXXX
Port 8
XXXXXXXX
Port 9
XXXXXXXX
Port A
---XXXXX
Port 0
00000000
Port 1
00000000
Port 2
00000000
Port 3
00000000
Port 4
00000000
Port 6
00000000
Port 7
00000000
Port 8
00000000
Port 9
00000000
Port A
---00000
B
Port 4
00000000
B
B
B
B
B
B
B
B
B
B
B
B
B
B
B
B
B
B
B
B
B

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